Calculation of ADC SNR in Cadence Skill/Ocean

In response to Calcul of SNR in CADENCE

I generally don’t like Cadence’s FFT command as it only computes a radix-2 FFT. This is great if your sampling frequency happens to be a power of two of your input frequency. Most of the time, this is the case (or close enough to be immaterial). That’s not the case with me.

I’ll save how I get a non-radix-2 FFT into Cadence for later (I use Matlab). However, here’s how I compute SNR/SNDR when I have an FFT already provided:

  1. I run the simulation for a time period of (kcyc+ncyc)/fS. fS is the sampling frequency. kcyc is the number of cycles to leave for startup transients.
  2. I do an FFT over the last ncyc samples. So, even though I run the ADC for (kcyc+ncyc)/fS, I exclude the first kcyc samples. I generally use a minimum 4-term Blackman-Harris window. In simulation, if you ahve the ability to pick your sample frequenciy and input frequency, you don’t need to window; your FFT frequencies will be right-on with the FFT bins. I window anyway.
  3. I sum up +/- 5 FFT bins around the nominal input frequency. This is because I use the BH4 window, which extends the main lobe of the signal out. I’ve found that +/- 5 bins definitely catches the signal. Any additional noise it catches if usually immaterial.
  4. For an SNR (versus an SNDR) measurement, I subtract out any distortion. I define distortion as any odd-order harmonics of the signal (odd multiples of the input frequency) that fall within the bandwidth of interest.
  5. After summing up signal power, noise power, and noise+distortion power, I comute the ratios to get SNR or SNDR.

Anyway. Here’s the code to do it. Once again, I relase it under the GNU Public License to encourage others to contribute back their improvements:

This entry was posted in Analog Professional and tagged , , , , , , , , , , , . Bookmark the permalink. Post a comment or leave a trackback: Trackback URL.

One Comment

  1. Jack Wang
    Posted December 12, 2008 at 7:11 am | Permalink

    Hi, I am doing project on a similar topic of this, which is to design a DEM circuit for feedback DAC of delta-sigma modulator. And I found the post here is useful for me. many thanks for your work.

Post a Comment

You must be logged in to post a comment.