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	<title>Comments on: Typical CMOS device/process options</title>
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		<title>By: Minimizing leakage for high-performance CMOS circuits &#124; Circuit Design</title>
		<link>http://www.circuitdesign.info/blog/2008/11/typical-cmos-deviceprocess-options/comment-page-1/#comment-151</link>
		<dc:creator>Minimizing leakage for high-performance CMOS circuits &#124; Circuit Design</dc:creator>
		<pubDate>Wed, 03 Dec 2008 04:32:19 +0000</pubDate>
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		<description>[...] was asked a question on how to reduce leakage for digital circuits. I started by detailing process options that effect leakage in a prior article, each effective both leakage and circuit performance. In this article, I will detail two methods to [...]</description>
		<content:encoded><![CDATA[<p>[...] was asked a question on how to reduce leakage for digital circuits. I started by detailing process options that effect leakage in a prior article, each effective both leakage and circuit performance. In this article, I will detail two methods to [...]</p>
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