My other blogs & plans for the future

It used to be that I’d post just about anything here. However, after a few months of posting circuit design articles, I developed a consistent readership and decided that most of you aren’t interested in my daily life and/or the tech hobbies that I might be up to. As a result, I separated my personally-centered blogs from this blog.
I just wanted to quickly mention that if anyone is interested, I have two other blogs:
Personal Blog
Tech (software/computer) Blog

Also, you’ll notice that Google Ads are prominently displayed on this blog. I wanted to recoup the hosting costs of running this blog. Unfortunately, that didn’t end up being as profitable as I thought. So, as soon as I hit $100 of ad revenue (which is the minimum to cash out of my Google AdSense account), I’ll remove the ads. I’ll essentially be eating the hosting cost (in addition to the time I’ve put into the blog).

Unless I change my mind. Which is unlikely.

Also, I might try out some more social features on the web site. If I get the time. Which is also unlikely.

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Tunable Non-Foster Match Using Switched Capacitor

Foster’s reactance theorem states that any reactance Cannot render equation. Use Firefox instead. increases as a function of frequency Cannot render equation. Use Firefox instead.. This is true of the impedance looking into an antenna, where the reactance may be a large part of the overall impedance. The task in matching the antenna (for maximum power transfer and therefore maximum SNR) is to cancel the reactance (or susceptance) and match the resistance.

Unfortunately, this can’t be done over a large range, because as Foster’s reactance theorem states, as soon as you deviate a little from your center frequency, both the inductive reactance of your antenna and the reactance of whatever you’re using to cancel it (most likely a capacitive element) both increase (go toward Cannot render equation. Use Firefox instead.). So, for every change Cannot render equation. Use Firefox instead. in frequency from the center frequency, your antenna reactance goes up by some amount Cannot render equation. Use Firefox instead., but your matching element’s reactance also goes up by some amount Cannot render equation. Use Firefox instead..

If you had a Non-Foster element, the reactance of your tuning element would go down by some amount Cannot render equation. Use Firefox instead., compensating for the increased reactance of the antenna. You would then have  a broadband (or broader) match.

Most attempts to do this have required the use of active elements (such as gyrators) so synthesis a negative impedance. However, I’m wondering if  a switched-capacitor circuit can be used to synthesize this Non-Foster reactance. Most analyses of switched-capacitor circuits show that they are synthetic resistors at frequencies far below the switching frequency. However, what does the impedance look like near the switching frequency? Read More »

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Median vs Mean

I’ve been doing some statistical measurements lately (more to follow). It occurs to me that while most people measure the mean of a set of measurements, the median is more useful.

Read More »

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CircuitDesign.Info: Site maintenance

Some of you may have noticed that the site was down for a day last week.

Expect a bit more down-time: I’m going to do a bit of experimentation to ensure that future down-time doesn’t happen again (improve reliability).

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Special thanks to Justin Patrin

Special thanks to Justin Patrin for his awesome ASCIIMathML plugin. From now on, equations will look nicer, like:

Cannot render equation. Use Firefox instead.

You rock, Justin! I (and my readers) thank you.

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Differential Circuits Follow-Up

Introduction

You’ll notice that this post has Matt Miller listed as the author. Poojan requested Matt’s comments on his differential circuit post. Poojan was impressed with my comments enough that he decided to make it a follow-up post. So, this post is co-written by both Poojan and Matt.

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The benefits of differential circuits

Introduction

From my personal blog:

I’ve been lucky enough to find myself in a team that’s intent on finding the best circuit design for a given application. This doesn’t happen often to many people, but I feel that I’ve had more than my share of this opportunity.

The conclusion is usually that we come up with some topology (let’s call it circuit X) that optimizes all the performance criteria. I walk away wanting to generalize the experience with the lesson that circuit X is the best circuit ever, and I want to use it everywhere.

Inevitably, I find that some other topology Y is better suited for some other application. There were some specific constraints or conditions on circuit X that don’t apply to circuit Y, and as a result, circuit Y is more optimal for application Y.

It is for this reason that I won’t say that differential circuits are always better than their single ended counter-part. I will say that in my experience, I’ve come across the case where the differential circuit–or, really, the differential approach–is more effective than its single-ended counterpart. However, that’s not why I’ve decided to write this post.

Unfortunately, I’ve come across several engineers that make the generalization error in the opposite direction: they state that single-ended circuits save current. I will present a counter-example that is sufficient to disprove this generalization. Keep in mind that it doesn’t prove the opposite generalization (that differential circuits are always better).

Read More »

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PCB & IC Layout Designer

I generally don’t accept solicitations to post resumes, but I am making an exception for a very talented friend of mine.

I know a very good IC designer and PCB designer. My experience with him is as an IC layout designer. However, most of his PCB customers cite him as the best PCB layout designer they’ve come across. I’ll focus on his IC skills, since I can attest to that.

He’s most often hired as a consultant embedded in a design team. However, he’s capable of and set up for turn-key work (taking schematics and sending back GDS II). He’s skilled in Cadence (Virtuoso XL, Assura) and Mentor (IC Layout, Calibre) design tools.

If you’re interested, fill out the Feedback (Contact Us) form. I will forward requests to him.

He’s worked on the following products (since I’ve met him) and much more:

  • CMOS 90 nm transceiver IC including ADC/DAC, RF: massive integration effort, requiring careful shielding and differential matching of many RF/analog lines
  • IBM 8WL BiCMOS IC including high-linearity mixer with feedback: extremely compact layout, minimizing RF parasitics
  • CMOS 90 nm continuous-time sigma-delta ADC: detailed matching (common centroiding) of CMOS devices and matching of routing parasitics
  • TSMC 0.18 um CMOS class-D audio amplifier IC: integration and isolation of several analog blocks with large digital circuit
  • CMOS 0.18 um all-digital RF transmitter (resulted in this publication)

Each of the above has been a first-pass success. He contracted for over a decade at Motorola Labs (Motorola’s corporate research center at their headquarters near Chicago), Atmel, Freescale Semiconductor, and several Motorola product groups. He ran a circuit board development group at Tellabs. He’s extremely pleasant to work with and does very well in a team environment (both as a lead developer and as a team member).

He is a US citizen.

He is available for hourly contracting.

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