Cadence has a stability analysis that returns loop gain (return ratio). Typically, this is done using a log sweep of frequency. The reason is that doing a uniform linear sweep results in too large frequency steps for low frequencies and/or too large of a step for higher frequencies. Unfortunately, when you do a logarithmic sweep, […]
Tag Archives: stability
Answers question in I/Q Noise figure, and on how to do stability in Cadence ADE.
One of the defining traits of analog CMOS designers is the ability to implement a common-mode feedback (CMFB) loop. When the input devices on a differential pair are all NMOS (or NPN), and the loads are either inductors or resistors, a common-mode feedback loop is unnecessary, because the output resistance of the differential pair is […]