{"id":696,"date":"2009-03-10T16:13:45","date_gmt":"2009-03-10T21:13:45","guid":{"rendered":"https:\/\/www.circuitdesign.info\/blog\/?p=696"},"modified":"2025-07-02T23:05:26","modified_gmt":"2025-07-03T04:05:26","slug":"dual-dac-ctsd-wider-bandwidth-and-higher-snr-part-2","status":"publish","type":"post","link":"https:\/\/www.circuitdesign.info\/blog\/2009\/03\/dual-dac-ctsd-wider-bandwidth-and-higher-snr-part-2\/","title":{"rendered":"Dual DAC CTSD | Wider Bandwidth and Higher SNR &#8212; Part 2"},"content":{"rendered":"<h2><a name=\"_introduction\"><\/a>Introduction<\/h2>\n<p>So, we want to <a href=\"https:\/\/www.circuitdesign.info\/blog\/2009\/02\/dual-dac-ctsd-wider-bandwidth-and-higher-snr-part-1\/\">break down our continuous-time sigma-delta feedback into two paths<\/a>:<\/p>\n<ol type=\"1\">\n<li>A low-precision tight loop that delivers the first sample to the quantizer<\/li>\n<li>A higher-precision loop that goes through a clock delay to minimize &#8220;metastability&#8221; (indecision)<\/li>\n<\/ol>\n<p><!--more--><\/p>\n<h2><a name=\"_dac_feedback\"><\/a>DAC Feedback<\/h2>\n<p>As a small aside, recall that the DAC feedback looks similar to the following:<\/p>\n<p><a href=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dacoutput.png\"> <img decoding=\"async\" src=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dacoutput.png\" alt=\"\" width=\"320\" \/> <\/a><\/p>\n<p>The input to the quantizer is the convolution of this signal with the impulse response <em>h<\/em>(<em>t<\/em>) of the noise-shaping filter <em>H<\/em>(<em>s<\/em>). As we did with the impulse-invariant transform, we break down the noise-shaping filter into partial-fraction expansion:<\/p>\n<p>$$H(s) = \\sum_{k} F_{k}(s) = \\sum_{k} \\frac{g_k}{s &#8211; p_k}$$<\/p>\n<p>Each of these $F_{k}$ is a single-pole filter, with an impulse response that looks something like:<\/p>\n<p><a href=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dualimpulseresponse.png\"> <img decoding=\"async\" src=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dualimpulseresponse.png\" alt=\"\" width=\"320\" \/> <\/a><\/p>\n<hr \/>\n<h2><a name=\"_dual_filter_analysis\"><\/a>Dual-Filter Analysis<\/h2>\n<p>The first sample at the quantizer is the convolution of a DAC symbol with the impulse response. This amounts to the integral over one sample period:<\/p>\n<p><a href=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dualimpulseresponsesample1.png\"> <img decoding=\"async\" src=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dualimpulseresponsesample1.png\" alt=\"\" width=\"320\" \/> <\/a><\/p>\n<p>The rest of the samples can be passed through a filter that looks like this:<\/p>\n<p><a href=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dualimpulseresponserest.png\"> <img decoding=\"async\" src=\"https:\/\/www.circuitdesign.info\/blog\/wp-content\/uploads\/2009\/03\/dualimpulseresponserest.png\" alt=\"\" width=\"320\" \/> <\/a><\/p>\n<p>The main difference between this remaining filter and the original is that it is scaled by $A_{1} = e^{-p_{k}T_s}$. Note that the delay in the filter is already included in the system due to the extra clock delay by the second DAC.<\/p>\n<hr \/>\n<h2><a name=\"_summary\"><\/a>Summary<\/h2>\n<p>So, in the end, we have replaced $H(s)$ with:<\/p>\n<p>$$H'(s) = \\sum_k e^{-p_{k}T_s}F_{k}(s)$$<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Introduction So, we want to break down our continuous-time sigma-delta feedback into two paths: A low-precision tight loop that delivers the first sample to the quantizer A higher-precision loop that goes through a clock delay to minimize &#8220;metastability&#8221; (indecision)<\/p>\n","protected":false},"author":4,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[3],"tags":[19,48,20,49,139,140,44],"class_list":["post-696","post","type-post","status-publish","format-standard","hentry","category-analog-pro","tag-adc","tag-continuous-time","tag-dac","tag-feedback","tag-metastability","tag-partial-fraction-expansion","tag-sigma-delta"],"jetpack_featured_media_url":"","jetpack_shortlink":"https:\/\/wp.me\/poCEy-be","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts\/696","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/users\/4"}],"replies":[{"embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/comments?post=696"}],"version-history":[{"count":17,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts\/696\/revisions"}],"predecessor-version":[{"id":1255,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts\/696\/revisions\/1255"}],"wp:attachment":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/media?parent=696"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/categories?post=696"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/tags?post=696"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}