{"id":749,"date":"2009-06-11T07:29:03","date_gmt":"2009-06-11T12:29:03","guid":{"rendered":"https:\/\/www.circuitdesign.info\/blog\/2009\/06\/pcb-ic-layout-designer\/"},"modified":"2009-06-11T07:33:37","modified_gmt":"2009-06-11T12:33:37","slug":"pcb-ic-layout-designer","status":"publish","type":"post","link":"https:\/\/www.circuitdesign.info\/blog\/2009\/06\/pcb-ic-layout-designer\/","title":{"rendered":"PCB &amp; IC Layout Designer"},"content":{"rendered":"<p><font color=\"#808080\">I generally don\u2019t accept solicitations to post resumes, but I am making an exception for a very talented friend of mine.<\/font><\/p>\n<p>I know a <em>very<\/em> good IC designer and PCB designer. My experience with him is as an IC layout designer. However, most of his PCB customers cite him as the best PCB layout designer they\u2019ve come across. I\u2019ll focus on his IC skills, since I can attest to that.<\/p>\n<p>He\u2019s most often hired as a consultant embedded in a design team. However, he\u2019s capable of and set up for turn-key work (taking schematics and sending back GDS II). He\u2019s skilled in Cadence (Virtuoso XL, Assura) and Mentor (IC Layout, Calibre) design tools.<\/p>\n<p>If you\u2019re interested, fill out the <a title=\"Contact Poojan about hiring this IC\/PCB layout designer\" href=\"https:\/\/www.circuitdesign.info\/blog\/feedback-contact-us\/\" target=\"_blank\">Feedback (Contact Us)<\/a> form. I will forward requests to him.<\/p>\n<p>He\u2019s worked on the following products (since I\u2019ve met him) and much more:<\/p>\n<ul>\n<li>CMOS 90 nm transceiver IC including ADC\/DAC, RF: massive integration effort, requiring careful shielding and differential matching of many RF\/analog lines <\/li>\n<li>IBM 8WL BiCMOS IC including high-linearity mixer with feedback: extremely compact layout, minimizing RF parasitics <\/li>\n<li>CMOS 90 nm continuous-time sigma-delta ADC: detailed matching (common centroiding) of CMOS devices and matching of routing parasitics <\/li>\n<li>TSMC 0.18 um CMOS class-D audio amplifier IC: integration and isolation of several analog blocks with large digital circuit <\/li>\n<li>CMOS 0.18 um all-digital RF transmitter (resulted in <a title=\"An all-digital universal RF transmitter [CMOS RF modulator and PA]\" href=\"detailed matching (common centroiding) of CMOS devices and matching of routing parasitics\" target=\"_blank\">this<\/a> publication) <\/li>\n<\/ul>\n<p>Each of the above has been a first-pass success. He contracted for over a decade at Motorola Labs (Motorola\u2019s corporate research center at their headquarters near Chicago), Atmel, Freescale Semiconductor, and several Motorola product groups. He ran a circuit board development group at Tellabs. He\u2019s extremely pleasant to work with and does very well in a team environment (both as a lead developer and as a team member).<\/p>\n<p>He is a US citizen.<\/p>\n<p>He is available for hourly contracting.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>I generally don\u2019t accept solicitations to post resumes, but I am making an exception for a very talented friend of mine. I know a very good IC designer and PCB designer. My experience with him is as an IC layout designer. However, most of his PCB customers cite him as the best PCB layout designer [&hellip;]<\/p>\n","protected":false},"author":4,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[3],"tags":[146,145,40],"class_list":["post-749","post","type-post","status-publish","format-standard","hentry","category-analog-pro","tag-common-centroid","tag-contractor","tag-layout"],"jetpack_featured_media_url":"","jetpack_shortlink":"https:\/\/wp.me\/poCEy-c5","jetpack_sharing_enabled":true,"_links":{"self":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts\/749","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/users\/4"}],"replies":[{"embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/comments?post=749"}],"version-history":[{"count":3,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts\/749\/revisions"}],"predecessor-version":[{"id":752,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/posts\/749\/revisions\/752"}],"wp:attachment":[{"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/media?parent=749"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/categories?post=749"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.circuitdesign.info\/blog\/wp-json\/wp\/v2\/tags?post=749"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}