Author Archives: Poojan Wagh

PCB & IC Layout Designer

I generally don’t accept solicitations to post resumes, but I am making an exception for a very talented friend of mine. I know a very good IC designer and PCB designer. My experience with him is as an IC layout designer. However, most of his PCB customers cite him as the best PCB layout designer [...]

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Polar vs Cartesian RF Modulator Efficiency

I’ve been fielding quite a few questions lately about polar modulation. Indeed, polar modulators are theoretically more efficient. However, this does not need to be the case. I will highlight (technically, self-promote) a Cartesian scheme that can produce an RF signal as efficiently as a polar modulator—with fewer implementation issues.

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Dual DAC CTSD | Wider Bandwidth and Higher SNR — Part 2

Introduction So, we want to break down our continuous-time sigma-delta feedback into two paths: A low-precision tight loop that delivers the first sample to the quantizer A higher-precision loop that goes through a clock delay to minimize “metastability” (indecision)

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Dual DAC CTSD | Wider Bandwidth and Higher SNR — Part 1

Introduction Consider our usual continuous-time sigma-delta (CTSD) ADC: x(t) is the analog input and y[n] is the digital output and feedback signal that drives the DAC. H(s) is the loop filter and Q represents the quantizer. One of the main difficulties with continuous-time sigma-delta’s is that when the digital output does not match the analog [...]

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Impulse Invariant Transform

Introduction The impulse invariant transform (IIT) is a method of taking a continuous-time system H(s) and converting it to a discrete-time system. There are multiple ways of doing this, but the IIT does so with the constraint that the impulse response of the discrete-time system is a sampled version of the impulse response of the [...]

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Non-Radix-2 FFT in Cadence/Ocean/Skill/Spectre | Using Cadence IPC to talk to Matlab (or anything else)

Introduction I had been working on a pulse-width-modulation (PWM) design. It was a pseudo-digital implementation, in that the output was clocked by a high-speed clock. The actual switching rate was much lower than this clock. I wanted to simulate this design in Cadence/Spectre by running a transient and then taking an FFT. However, I ran [...]

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The Viterbi Sigma-Delta (at CircuitSage)

I’ve posted a guest article at Circuit Sage, detailing the derivation of a “Viterbi” over-sampling data converter. I’m quite proud of this one. Go over and check it out. FYI: this is also the reason I didn’t post directly to this site this week. I try to do a post per week, but the article [...]

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Asymmetric chopping for improved IM3 | A dead-end research topic?

In my prior post, I discussed the use of “chopping” (or pre- and post-mixing) to improve the IM2 of RF/analog circuits. New readers should go back and read that post in order to understand the nomenclature and variable names in this post. Lately, I’ve been considering whether any similar (but different) technique can be used [...]

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