Median vs Mean

I’ve been doing some statistical measurements lately (more to follow). It occurs to me that while most people measure the mean of a set of measurements, the median is more useful.

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CircuitDesign.Info: Site maintenance

Some of you may have noticed that the site was down for a day last week.

Expect a bit more down-time: I’m going to do a bit of experimentation to ensure that future down-time doesn’t happen again (improve reliability).

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Special thanks to Justin Patrin

Special thanks to Justin Patrin for his awesome ASCIIMathML plugin. From now on, equations will look nicer, like:

Cannot render equation. Use Firefox instead.

You rock, Justin! I (and my readers) thank you.

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Differential Circuits Follow-Up

Introduction

You’ll notice that this post has Matt Miller listed as the author. Poojan requested Matt’s comments on his differential circuit post. Poojan was impressed with my comments enough that he decided to make it a follow-up post. So, this post is co-written by both Poojan and Matt.

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The benefits of differential circuits

Introduction

From my personal blog:

I’ve been lucky enough to find myself in a team that’s intent on finding the best circuit design for a given application. This doesn’t happen often to many people, but I feel that I’ve had more than my share of this opportunity.

The conclusion is usually that we come up with some topology (let’s call it circuit X) that optimizes all the performance criteria. I walk away wanting to generalize the experience with the lesson that circuit X is the best circuit ever, and I want to use it everywhere.

Inevitably, I find that some other topology Y is better suited for some other application. There were some specific constraints or conditions on circuit X that don’t apply to circuit Y, and as a result, circuit Y is more optimal for application Y.

It is for this reason that I won’t say that differential circuits are always better than their single ended counter-part. I will say that in my experience, I’ve come across the case where the differential circuit—or, really, the differential approach—is more effective than its single-ended counterpart. However, that’s not why I’ve decided to write this post.

Unfortunately, I’ve come across several engineers that make the generalization error in the opposite direction: they state that single-ended circuits save current. I will present a counter-example that is sufficient to disprove this generalization. Keep in mind that it doesn’t prove the opposite generalization (that differential circuits are always better).

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PCB & IC Layout Designer

I generally don’t accept solicitations to post resumes, but I am making an exception for a very talented friend of mine.

I know a very good IC designer and PCB designer. My experience with him is as an IC layout designer. However, most of his PCB customers cite him as the best PCB layout designer they’ve come across. I’ll focus on his IC skills, since I can attest to that.

He’s most often hired as a consultant embedded in a design team. However, he’s capable of and set up for turn-key work (taking schematics and sending back GDS II). He’s skilled in Cadence (Virtuoso XL, Assura) and Mentor (IC Layout, Calibre) design tools.

If you’re interested, fill out the Feedback (Contact Us) form. I will forward requests to him.

He’s worked on the following products (since I’ve met him) and much more:

  • CMOS 90 nm transceiver IC including ADC/DAC, RF: massive integration effort, requiring careful shielding and differential matching of many RF/analog lines
  • IBM 8WL BiCMOS IC including high-linearity mixer with feedback: extremely compact layout, minimizing RF parasitics
  • CMOS 90 nm continuous-time sigma-delta ADC: detailed matching (common centroiding) of CMOS devices and matching of routing parasitics
  • TSMC 0.18 um CMOS class-D audio amplifier IC: integration and isolation of several analog blocks with large digital circuit
  • CMOS 0.18 um all-digital RF transmitter (resulted in this publication)

Each of the above has been a first-pass success. He contracted for over a decade at Motorola Labs (Motorola’s corporate research center at their headquarters near Chicago), Atmel, Freescale Semiconductor, and several Motorola product groups. He ran a circuit board development group at Tellabs. He’s extremely pleasant to work with and does very well in a team environment (both as a lead developer and as a team member).

He is a US citizen.

He is available for hourly contracting.

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Polar vs Cartesian RF Modulator Efficiency

I’ve been fielding quite a few questions lately about polar modulation. Indeed, polar modulators are theoretically more efficient. However, this does not need to be the case. I will highlight (technically, self-promote) a Cartesian scheme that can produce an RF signal as efficiently as a polar modulator—with fewer implementation issues.
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Dual DAC CTSD | Wider Bandwidth and Higher SNR — Part 2

Introduction

So, we want to break down our continuous-time sigma-delta feedback into two paths:

  1. A low-precision tight loop that delivers the first sample to the quantizer
  2. A higher-precision loop that goes through a clock delay to minimize “metastability” (indecision)

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