In my prior post, I discussed the use of "chopping" (or pre- and post-mixing) to improve the IM2 of RF/analog circuits. New readers should go back and read that post in order to understand the nomenclature and variable names in this post.
Lately, I’ve been considering whether any similar (but different) technique can be used to improve IM3. I went through a few thought experiments and eventually concluded that it couldn’t be done. Nonetheless, I was quite proud of the journey and thought it was worth sharing. I also hope that someone else will use the ideas presented here to come up with something better. (This hope is true of everything I publish here.)
In short, it’s good to celebrate your achievements and document your failures. This post is a case of the latter.
Continued…
Posted in Analog Professional.
Tagged with chopping, IIP2, IIP3, IM2, IM3.
I’ve been receiving a few questions from the readers. (Yes, I actually have readers—other than you.)
2008-12-28 Update
I misread the email; the initial version of the I/Q noise figure discussion was completely wrong.
Continued…
Posted in Analog Professional.
Tagged with cadence, downconverter, noise figure, quadrature, spectre, stability.
IM2
Consider the fully differential amplifier shown below:
Continued…
Posted in Analog Professional.
Tagged with chopping, IM2, IP2, matching, mixer, pseudonoise, spread spectrum.
I received a request to go through the design of a flip-flop. Every flip-flop I have designed has been a master-slave D flip-flop, built out of two D latches. I’ll start with a basic CMOS latch and go into more optimized latch topologies.
Update 2008-12-19
This post probably didn’t make sense to many of you. I was representing C-bar (negation of C) by an underline. Unfortunately, WordPress (or maybe my theme) wasn’t rendering this underline, so 
didn’t look any different from 
. I’ve (obviously) rectified this ambiguity through the magic of Latex. If there are any errors now, they are solely my fault. (Let me know.)
Continued…
Posted in Digital Professional.
Tagged with CMOS, divider, fully custom, memory.
I’ve received a request to detail the design of a flip-flop. Before I get to that, I wanted to go through a bit of illustration with regard to minimizing MOS diffusion parasitics. I will start with the basics of detailing the MOS semiconductor structure. From there, I’ll display some layout configurations that minimize MOS diffusion capacitance. Continued…
Posted in Analog Professional.
Tagged with CMOS, diffusion, fully custom, high speed logic, layout, parasitics.
I was asked a question on how to reduce leakage for digital circuits. I started by detailing process options that effect leakage, each effective both leakage and circuit performance. In this article, I will detail two methods to reduce leakage while maintaining circuit performance. I assume that the circuit at hand requires the highest performance in some active mode but must greatly reduce its leakage in a standby mode. Continued…
Posted in Digital Professional.
Tagged with body bias, leakage, regulator, submicron.
I received an inquiry on how to reduce leakage. I will cover how to do so in a future article. However, before I do, let’s go over some process options that effect leakage. Continued…
Posted in Digital Professional.
In a previous post, I discussed the trade-offs in linearity of several continuous-time sigma-delta schemes. In this post, I will describe a method that linearizes the sigma-delta noise-shaping filter (NSF). That is, the scheme presented in this article greatly suppresses the linearity requirements on the noise-shaping filter. This method applies to both discrete-time and continuous-time sigma-delta ADC’s. However, it is more powerful with continuous-time sigma-delta because it enables the active-RC configuration.
Continued…
Posted in Analog Professional.
Tagged with continuous time, continuous time sigma-delta, linearity, sigma delta.
