Consider the circuit below: Let’s say that you’ve designed the circuit with a supply voltage (VDD) of 2.4 V. It’s performing very well. You meet exactly the specified linearity and noise requirements, and are within the desired current limits. The power dissipated across the PMOS and NMOS devices which dictate SNR are: PMOS: IDP×VDSATP = […]
Analog design does not scale the way digital design does. Namely, as process shrinks, one does not immediately benefit by having reduced power consumption for the same performance. I will show in this post the main constraint involved in analog/RF design: that to maintain a given SNR, a certain amount of power must be consumed […]
In this post, I will show an evolution of a trans-conducting LNA (rather than a voltage-gain LNA). This is a prime example of current-mode circuit design, which has benefits in terms of linearity—especially for low-voltage scaling in RFCMOS design.
One of the defining traits of analog CMOS designers is the ability to implement a common-mode feedback (CMFB) loop. When the input devices on a differential pair are all NMOS (or NPN), and the loads are either inductors or resistors, a common-mode feedback loop is unnecessary, because the output resistance of the differential pair is […]
I sat down to write this blog entry. Just me and my Dixon Ticonderoga #2. First thing I wrote was “Analog is like grayscale.” I immediately erased it. Even the word “grayscale” is too technical for what I want to explain. Remember Scantron? You used to have to bring a #2 pencil to take the […]
I wasn’t too happy about my previous attempt to explain the difference between Analog and Digital. I got lost in a lot of terminology (gadgets, signals, etc). In addition, I ended up approaching the distinction from an implementation perspective (how the devices work) rather than a user perspective (why things are better). So, rather than […]
I previously blogged about some scripts I use to help Cadence & Subversion be more compatible. I received some feedback that the scripts were incomplete and came without any usage model. So, I went through an excercise to document the scripts and to make sure they were complete.
However, here’s how I compute SNR/SNDR from an FFT using Cadence Ocean/Skill.
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