Introduction I had been working on a pulse-width-modulation (PWM) design. It was a pseudo-digital implementation, in that the output was clocked by a high-speed clock. The actual switching rate was much lower than this clock. I wanted to simulate this design in Cadence/Spectre by running a transient and then taking an FFT. However, I ran […]
The two inverters chasing their tail to the right of the input inverters represent a memory unit (i.e. a latch). When one output is high the other one is forced low. This low output then reinforces the first output being high. These two inverters form a positive feedback system.
I was asked a question on how to reduce leakage for digital circuits. I started by detailing process options that effect leakage, each effective both leakage and circuit performance. In this article, I will detail two methods to reduce leakage while maintaining circuit performance. I assume that the circuit at hand requires the highest performance […]