Response to EDABoard question: ADC in Matlab simulink

I’ve put together a 2nd order continuous sigma-delta Simulink model as a starting point. This is the multi-port feedback configuration (feeds back into input of 1st and 2nd integrators). I tried a 1st-order sigma-delta, but it’s hard to demonstrate noise-shaping with a 1st order, since they are not chaotic enough. Even the 2nd order shows some limit cycles. The simulink model has these features:

- Parameters

F1 : gain of 1st integrator

F2: gain of 2nd integrator

A1/A2 (optional): models finite circuit gain of integrators

fmod: frequency of input (sinusoid)

acmag: amplitude of input

tQ: sampling period of quantizer

ncyc: number of cycles (of input) to analyze for FFT

kcyc: number of cycles (of input) to leave for startup - single-bit quantizer
- multi-point feeeback (requires 2 DAC’s)

I’ve also created a matlab file that runs this model and does an FFT on the output. This file runs the simulink model and plots an FFT of the output. I haven’t messed with the coefficients or anything, but it is a good starting point.

## 19 Comments

hii there,

I am doing project on delta sigma ADC for gsm receiver …. i have developed a simulink model and now i should develop a code that runs the FFT for the model that i have develped i am a bit confused in developing the related code for the model that i have developed ..could u please help me in developing the FFT code for the model that i had build……..

What specifically are you confused about? Do you have the simulink output (sampled digital words) in a matlab variable (vector)? If so, it should be pretty easy.

I have some question if u’d be kind enough. I must say I am new to ADC’s, we have an ADC with our machine tools controller but we don’t know anything about it except for its sampling frequency and resolution (12-13) bits. So since we were modelling the whole controller so we needed to simulate an approximate model of the ADC as well. Anyways.

1- Why the your ADC does not have any filtering and decimation at the output ?

2- Can i replace your ‘sign’ block with a 12 bit quantizer ?.

3- Wha about the Gain in the integrators block ? I mean can we actually compute them or just arbirary.

4- Our ADC does not have any delays at its output (since it will actually destroy the whole controller). So these simulink integrators, do they have substancial delays ?

Hi, Daniyal. The ADC I have is a very specific type of ADC: a signma-delta ADC (and a continuous-time one at that). It is pretty complicated. If you’re building a controller, I’d suggest a Nyquist ADC. Sigma-Delta’s themselves include a feedback loop. Adding a feedback loop around the ADC amounts to having two interacting loops to stabilize. Not an easy task.

Anyway, I’ll attempt to answer your questions:

1. Mainly because it wasn’t germain to what I’m trying to model. You would need a decimation filter, but that’s done in the digital domain and is predictable and relatively easy to design.

2. Yes. This amounts to having a higher resolution and will only make things better. However, if you have a 12-bit quantizer to begin with, you might not need a sigma-delta (certainly not a continuous-time one).

3. This is difficult. The gains are sort of trial-and-error to keep the loop stabilized. There are some attempts to predict what they should be, but most people use them as starting points for their trial-and-error.

4. The output of the ADC shouldn’t have any additional delay. The integrators in the simulink model are there to form an error amplifier. The delays they introduce are taken into account when looking at loop stability. So, the integrators introduce some (ideal) delay that should be accounted for when designing your feedback loop.

I get the strong impression that what you want isn’t really a continuous-time sigma-delta, but rather some sort of PWM controller that involves an ADC. If you’re still interested, email poojanwagh at this domain and I’ll take a look at it.

hi. i am doing project on Sigma delta analogue to digital converter and i need the matlab code for that how to calculate the Dynamic range and how to design the whole code?

thanks

Take a look here: http://www.circuitdesign.info/blog/2009/01/non-radix-2-fft-in-cadenceoceanskillspectre-using-cadenc-ipc-to-talk-to-matlab-or-anything-else/

It has more than what you need, but all the pieces are described in the post. You should be able to use that to compute SNR. The dynamic range is merely the range of inputs (or outputs) between 0 dB SNR and maximum SNR. If your ADC behaves well, this is equal to the maximum SNR.

Hi,

I am learning matlab(Self teaching using books) but one question is really giving some headache. I hope you can help me with that:

write a computer program to simulate an analog to digital converter using matlab. tha a/d must have the following specifications:

full-range input of +- x volt

y bit resolution

z sampling frequency

Please , I really need your help or if you can recommend me some books that deals with such things; it will really help me.

Sorry, John. I can’t offer much help. In fact, I don’t know why you’d want to simulate an ADC using Matlab unless it was some sort of algorithmic ADC (SAR, Sigma-Delta) that involved some signal processing. Basically, your plain-old flash ADC just does one thing: y = round(x * L)/L — assuming x is +/- 1 and L is the # of levels you want to quantize to.

If you want to look at things like SNR and sampling, it’s pretty easy to hand-compute it, and for sampling, pure Matlab isn’t really suited (Simulink is better). Maybe you knew that already.

Hi, thank you this is very helpful. Do you have the simulink model for the 3rd order?

Thanks

–gilbert

Gilbert: A simulink model for a 3rd order should be pretty simple. Just replace the 2nd-order noise-shaping filter with a 3rd-order.

Any one has the idea how to implement GSM jammer in Matlab Simulink.(noise jammer)

Bands are: GSM 900 . please

Hi…I am Ryan. I have done a 12-bit pipeline ADC ideal model in simulink…however, I don’t know how to calculate the value of SNDR in simulink…and also the graph of SNDR as function of offset and gain error…Since I have to do some project of Digital Calibration for pipeline ADC…Can you give me some examples or references, THX

@Ryan:

This should help: http://www.circuitdesign.info/blog/2009/01/non-radix-2-fft-in-cadenceoceanskillspectre-using-cadenc-ipc-to-talk-to-matlab-or-anything-else/

The post includes functions to separate out signal and noise/distortion–both graphically and numerically.

@Andrew:

Hi, Andrew. I’m not sure I understand why you’d want to do this in Matlab/Simulink. A 3-bit flash ADC is basically an 8-level comparator. Matlab/Simulink will give ideal values for both INL and DNL. It’d basically be doing the same thing as round(vin*4)/4, where vin was between -1.0 and 1.0. INL and DNL for a flash ADC are only interesting when you have matching included.

Hi, I need to implement a 3 bit flash ADC in Matlab/ simulink, and calculate its INL/DNL values… I was wondering if you could give me some suggestions on this.

Thanks

i m also working on that we can share our view

Any one has the idea how to implement Dual band GSM jammer in Matlab Simulink.

Bands are: GSM 900 & GSM 1800.

@Tanmay Bhatt:

Audio/Video compression isn’t my specialty. However, take a look at:

http://www.mathworks.com/matlabcentral/fileexchange/loadFile.do?objectId=3093&objectType=FILE

http://webscripts.softpedia.com/script/Scientific-Engineering-Ruby/Signal-Processing/Simulink-Video-Processing-B-34694.html

i am doing project in AUDIO AND VIDEO COMPRESSION , i need simulink models and any other types of simulation in AUDIO AND VIDEO COMPRESSION