Reader Round-Up (vol 1)
Answers question in I/Q Noise figure, and on how to do stability in Cadence ADE.
Read More..Answers question in I/Q Noise figure, and on how to do stability in Cadence ADE.
Read More..IM2 Consider the fully differential amplifier shown below:
The two inverters chasing their tail to the right of the input inverters represent a memory unit (i.e. a latch). When one output is high the other one is forced low. This low output then reinforces the first output being high. These two inverters form a positive feedback system.
Read More..I wanted to go through a bit of illustration with regard to minimizing MOS diffusion parasitics. I will start with the basics of detailing the MOS semiconductor structure. From there, I’ll display some layout configurations that minimize MOS diffusion capacitance.
Read More..I was asked a question on how to reduce leakage for digital circuits. I started by detailing process options that effect leakage, each effective both leakage and circuit performance. In this article, I will detail two methods to reduce leakage while maintaining circuit performance. I assume that the circuit at hand requires the highest performance […]
I received an inquiry on how to reduce leakage. I will cover how to do so in a future article. However, before I do, let’s go over some process options that effect leakage.
In a previous post, I discussed the trade-offs in linearity of several continuous-time sigma-delta schemes. In this post, I will describe a method that linearizes the sigma-delta noise-shaping filter (NSF). That is, the scheme presented in this article greatly suppresses the linearity requirements on the noise-shaping filter. This method applies to both discrete-time and continuous-time […]
The continuous-time sigma-delta (CTSD) analog-to-digital converter (ADC) is a class of sigma-delta analog-to-digital converters that utilize a continuous-time noise-shaping filter (NSF | H(s)). In this post, I analyze a few noise-shaping filter (NSF) architectures that affect highly linear CTSD ADC’s.